(kicad_pcb (version 3) (host pcbnew "(2013-jul-07)-stable")

  (general
    (links 0)
    (no_connects 0)
    (area 0 0 0 0)
    (thickness 1.6)
    (drawings 0)
    (tracks 0)
    (zones 0)
    (modules 3)
    (nets 3)
  )

  (page A3)
  (layers
    (15 F.Cu signal)
    (0 B.Cu signal)
    (16 B.Adhes user)
    (17 F.Adhes user)
    (18 B.Paste user)
    (19 F.Paste user)
    (20 B.SilkS user)
    (21 F.SilkS user)
    (22 B.Mask user)
    (23 F.Mask user)
    (24 Dwgs.User user)
    (25 Cmts.User user)
    (26 Eco1.User user)
    (27 Eco2.User user)
    (28 Edge.Cuts user)
  )

  (setup
    (last_trace_width 0.254)
    (trace_clearance 0.254)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.254)
    (segment_width 0.2)
    (edge_width 0.1)
    (via_size 0.889)
    (via_drill 0.635)
    (via_min_size 0.889)
    (via_min_drill 0.508)
    (uvia_size 0.508)
    (uvia_drill 0.127)
    (uvias_allowed no)
    (uvia_min_size 0.508)
    (uvia_min_drill 0.127)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.5 1.5)
    (pad_drill 0.6)
    (pad_to_mask_clearance 0)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFFBF)
    (pcbplotparams
      (layerselection 3178497)
      (usegerberextensions true)
      (excludeedgelayer true)
      (linewidth 0.150000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotothertext true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 +5V)
  (net 2 /HighCOut)

  (net_class Default "This is the default net class."
    (clearance 0.254)
    (trace_width 0.254)
    (via_dia 0.889)
    (via_drill 0.635)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
    (add_net "")
    (add_net +5V)
    (add_net /HighCOut)
  )

  (module USB-MiniBBig (layer F.Cu) (tedit 521064BD) (tstamp 53CC1D45)
    (at 193.548 102.2096 180)
    (fp_text reference USB-MiniBBig (at 6.70052 0.50038 270) (layer F.SilkS)
      (effects (font (size 0.762 0.762) (thickness 0.1905)))
    )
    (fp_text value VAL** (at -6.25094 0.59944 270) (layer F.SilkS)
      (effects (font (size 0.762 0.762) (thickness 0.1905)))
    )
    (fp_text user H2959CT-ND (at 0.29972 0.55118 180) (layer F.SilkS) hide
      (effects (font (size 0.8001 0.8001) (thickness 0.20066)))
    )
    (pad 9 smd rect (at 4.09956 3.2004 180) (size 2.49936 2.19964)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 8 smd rect (at -4.20116 3.2004 180) (size 2.49936 2.19964)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 7 smd rect (at 4.2037 -2.10058 180) (size 2.49936 2.19964)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 4 smd rect (at 0.80264 -2.60096 180) (size 0.50038 1.24968)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 3 smd rect (at 0.00254 -2.60096 180) (size 0.50038 1.24968)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 5 smd rect (at 1.60274 -2.60096 180) (size 0.50038 1.24968)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 2 smd rect (at -0.79756 -2.60096 180) (size 0.50038 1.24968)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 1 smd rect (at -1.59766 -2.60096 180) (size 0.50038 1.24968)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 6 smd rect (at -4.19862 -2.10058 180) (size 2.49936 2.19964)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad "" thru_hole circle (at -1.75006 0.09906 180) (size 1.19888 1.19888) (drill 0.89916)
      (layers *.Cu *.Mask F.SilkS)
    )
    (pad "" thru_hole circle (at 1.75006 0.09906 180) (size 1.19888 1.19888) (drill 0.89916)
      (layers *.Cu *.Mask F.SilkS)
    )
  )

  (module MOSFET-LFPAK56 (layer F.Cu) (tedit 539BB779) (tstamp 53CC26E3)
    (at 204.4827 102.87)
    (fp_text reference MOSFET-LFPAK56 (at 0 -2.7) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value VAL** (at -0.5 -2.7) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (pad 1 smd rect (at -1.905 2.54) (size 0.6 1.3)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 2 smd rect (at -0.635 2.54) (size 0.6 1.3)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 3 smd rect (at 0.635 2.54) (size 0.6 1.3)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 4 smd rect (at 1.905 2.54) (size 0.6 1.3)
      (layers F.Cu F.Paste F.Mask)
    )
    (pad 5 smd rect (at 0 -1.143) (size 4.9 4.65)
      (layers F.Cu F.Paste F.Mask)
    )
  )

  (module BOURNS-SRR1280 (layer F.Cu) (tedit 520518EF) (tstamp 53CC2743)
    (at 218.3511 103.2891)
    (path /5101B29F)
    (fp_text reference BOURNS-SRR1280 (at 0 -7.00024) (layer F.SilkS)
      (effects (font (size 0.762 0.762) (thickness 0.1905)))
    )
    (fp_text value "" (at 0 7.24916 90) (layer F.SilkS)
      (effects (font (size 0.762 0.762) (thickness 0.1905)))
    )
    (fp_line (start -6.25094 2.99974) (end -6.25094 6.25094) (layer F.SilkS) (width 0.381))
    (fp_line (start -6.25094 6.25094) (end 6.25094 6.25094) (layer F.SilkS) (width 0.381))
    (fp_line (start 6.25094 6.25094) (end 6.25094 2.99974) (layer F.SilkS) (width 0.381))
    (fp_line (start -6.25094 -6.25094) (end -6.25094 -2.99974) (layer F.SilkS) (width 0.381))
    (fp_line (start -6.25094 -6.25094) (end 6.25094 -6.25094) (layer F.SilkS) (width 0.381))
    (fp_line (start 6.25094 -6.25094) (end 6.25094 -2.99974) (layer F.SilkS) (width 0.381))
    (pad 1 smd rect (at -5.08 0) (size 3.4036 5.4102)
      (layers F.Cu F.Paste F.Mask)
      (net 1 +5V)
    )
    (pad 2 smd rect (at 5.08 0) (size 3.4036 5.4102)
      (layers F.Cu F.Paste F.Mask)
      (net 2 /HighCOut)
    )
  )

)