EESchema-LIBRARY Version 2.3  Date: Sat 18 Apr 2015 03:23:15 PM EDT
#encoding utf-8
#
# STM32F207
#
DEF STM32F207 U 0 40 Y Y 1 F N
F0 "U" -1500 -500 60 H V C CNN
F1 "STM32F207" -1400 -700 60 H V C CNN
F2 "~" 0 0 60 H V C CNN
F3 "~" 0 0 60 H V C CNN
DRAW
S -1800 2400 1700 -1050 0 1 0 f
X VBAT 1 -2100 1850 300 R 50 50 1 1 I
X PC13 2 -2100 1750 300 R 50 50 1 1 I
X PC14/OSC32_IN 3 -2100 1650 300 R 50 50 1 1 I
X PC15/OSC32_OUT 4 -2100 1550 300 R 50 50 1 1 I
X PH0/OSC_IN 5 -2100 1450 300 R 50 50 1 1 I
X PH1/OSC_OUT 6 -2100 1350 300 R 50 50 1 1 I
X NRST 7 -2100 1250 300 R 50 50 1 1 I
X PC0 8 -2100 1150 300 R 50 50 1 1 I
X PC1/ETH_MDC 9 -2100 1050 300 R 50 50 1 1 I
X PC2/TXD2/SPI2_MISO 10 -2100 950 300 R 50 50 1 1 I
X PA4/USART2_CK 20 -600 -1350 300 U 50 50 1 1 I
X PB11/USART3_RX/ETH_RMII_TX_EN 30 400 -1350 300 U 50 50 1 1 I
X PC9/DCMI_D3 40 2000 1050 300 L 50 50 1 1 I
X PA15/JTDI 50 500 2700 300 D 50 50 1 1 I
X BOOT0 60 -500 2700 300 D 50 50 1 1 I
X PC3/SPI2_MOSI 11 -2100 850 300 R 50 50 1 1 I
X PA5/SPI1_SCK 21 -500 -1350 300 U 50 50 1 1 I
X VCAP_1 31 500 -1350 300 U 50 50 1 1 I
X PA8/USART1_CK 41 2000 1150 300 L 50 50 1 1 I
X PC10/SPI3_SCK/USART3_TX/SART3_TX/DCMI_D8 51 400 2700 300 D 50 50 1 1 I
X PB8/DCMI_D6 61 -600 2700 300 D 50 50 1 1 I
X VSSA 12 -2100 750 300 R 50 50 1 1 I
X PA6/SPI1_MISO/DCMI_PIXCLK 22 -400 -1350 300 U 50 50 1 1 I
X VDD 32 600 -1350 300 U 50 50 1 1 I
X PA9/USART1_TX/DCMI_D0 42 2000 1250 300 L 50 50 1 1 I
X PC11/USART4_RX/SPI3_MISO/DCMI_D4/USART3_RX 52 300 2700 300 D 50 50 1 1 I
X PB9/DCMI_D7 62 -700 2700 300 D 50 50 1 1 I
X VDDA 13 -2100 650 300 R 50 50 1 1 I
X PA7/SPI1_MOSI/ETH_RMII_CRS_DV 23 -300 -1350 300 U 50 50 1 1 I
X PB12/USART3_CK/ETH_RMII_TXD0 33 2000 350 300 L 50 50 1 1 I
X PA10/USART1_RX/DCMI_D1 43 2000 1350 300 L 50 50 1 1 I
X PC12/USART5_TX/DCMI_D9/SPI3_MOSI 53 200 2700 300 D 50 50 1 1 I
X VSS 63 -800 2700 300 D 50 50 1 1 I
X PA0/USART2_RTS/UART4_TX 14 -2100 550 300 R 50 50 1 1 I
X PC4/ETH_RMII_RXD0 24 -200 -1350 300 U 50 50 1 1 I
X PB13/USART3_CTS/ETH_RMII_TXD1 34 2000 450 300 L 50 50 1 1 I
X A11/USART1_CTS 44 2000 1450 300 L 50 50 1 1 I
X PD2/USART5_RX/DCMI_D11 54 100 2700 300 D 50 50 1 1 I
X VDD 64 -900 2700 300 D 50 50 1 1 I
X PA1/UART4_RX/ETH_RMII_REF_CLK 15 -2100 450 300 R 50 50 1 1 I
X PC5/ETH_RMII_RXD1 25 -100 -1350 300 U 50 50 1 1 I
X PB14/SPI2_MISO/USART3_RTS 35 2000 550 300 L 50 50 1 1 I
X PA12/USART1_RTS 45 2000 1550 300 L 50 50 1 1 I
X PB3/JTDO/TRACESWO/SPI1_SCK 55 0 2700 300 D 50 50 1 1 I
X PA2/USART2_TX/ETH_MDIO 16 -2100 350 300 R 50 50 1 1 I
X PB0/ETH_MII/RXD2 26 0 -1350 300 U 50 50 1 1 I
X PB15/SPI2_MOSI 36 2000 650 300 L 50 50 1 1 I
X PA13/JTMS-SWDIO 46 2000 1650 300 L 50 50 1 1 I
X PB4/NJTRST/SPI3_MISO/SPI1_MISO 56 -100 2700 300 D 50 50 1 1 I
X USART2_RX/ETH_MII_COL 17 -900 -1350 300 U 50 50 1 1 I
X PB1/ETH_MII/RXD3 27 100 -1350 300 U 50 50 1 1 I
X PC6/USART6_TX/DCMI_D0 37 2000 750 300 L 50 50 1 1 I
X VCAP2 47 2000 1750 300 L 50 50 1 1 I
X PB5/ETH_PPS_OUT/SPI1_MOSI/SPI3_MOSI/DCMI_D10 57 -200 2700 300 D 50 50 1 1 I
X VSS 18 -800 -1350 300 U 50 50 1 1 I
X PB2/BOOT1 28 200 -1350 300 U 50 50 1 1 I
X PC7/USART6_RX/DCMI_D1 38 2000 850 300 L 50 50 1 1 I
X VDD 48 2000 1850 300 L 50 50 1 1 I
X PB6/USART1_TX/DCMI_D5 58 -300 2700 300 D 50 50 1 1 I
X VDD 19 -700 -1350 300 U 50 50 1 1 I
X PB10/SPI2_SCK/USART3_TX 29 300 -1350 300 U 50 50 1 1 I
X PC8/USART6_CK/DCMI_D2 39 2000 950 300 L 50 50 1 1 I
X PA14/JTCK/SWCLK 49 600 2700 300 D 50 50 1 1 I
X PB7/DCMI_VSYNC/USART1_RX 59 -400 2700 300 D 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library