test.elf: file format elf32-avr Disassembly of section .text: 00000000 <__vectors>: 0: 1d c0 rjmp .+58 ; 0x3c <__ctors_end> 2: 37 c0 rjmp .+110 ; 0x72 <__bad_interrupt> 4: 36 c0 rjmp .+108 ; 0x72 <__bad_interrupt> 6: 35 c0 rjmp .+106 ; 0x72 <__bad_interrupt> 8: 34 c0 rjmp .+104 ; 0x72 <__bad_interrupt> a: 33 c0 rjmp .+102 ; 0x72 <__bad_interrupt> c: 32 c0 rjmp .+100 ; 0x72 <__bad_interrupt> e: 31 c0 rjmp .+98 ; 0x72 <__bad_interrupt> 10: 30 c0 rjmp .+96 ; 0x72 <__bad_interrupt> 12: 2f c0 rjmp .+94 ; 0x72 <__bad_interrupt> 14: 2e c0 rjmp .+92 ; 0x72 <__bad_interrupt> 16: 2d c0 rjmp .+90 ; 0x72 <__bad_interrupt> 18: 2c c0 rjmp .+88 ; 0x72 <__bad_interrupt> 1a: 2b c0 rjmp .+86 ; 0x72 <__bad_interrupt> 1c: 2a c0 rjmp .+84 ; 0x72 <__bad_interrupt> 1e: 29 c0 rjmp .+82 ; 0x72 <__bad_interrupt> 20: 28 c0 rjmp .+80 ; 0x72 <__bad_interrupt> 22: 27 c0 rjmp .+78 ; 0x72 <__bad_interrupt> 24: 26 c0 rjmp .+76 ; 0x72 <__bad_interrupt> 26: 25 c0 rjmp .+74 ; 0x72 <__bad_interrupt> 28: 24 c0 rjmp .+72 ; 0x72 <__bad_interrupt> 2a: 5d c1 rjmp .+698 ; 0x2e6 <__vector_21> 2c: dc c0 rjmp .+440 ; 0x1e6 <__vector_22> 2e: 21 c0 rjmp .+66 ; 0x72 <__bad_interrupt> 30: 20 c0 rjmp .+64 ; 0x72 <__bad_interrupt> 32: 1f c0 rjmp .+62 ; 0x72 <__bad_interrupt> 34: 1e c0 rjmp .+60 ; 0x72 <__bad_interrupt> 36: 1d c0 rjmp .+58 ; 0x72 <__bad_interrupt> 38: b3 c0 rjmp .+358 ; 0x1a0 <__vector_28> 3a: 1b c0 rjmp .+54 ; 0x72 <__bad_interrupt> 0000003c <__ctors_end>: 3c: 11 24 eor r1, r1 3e: 1f be out 0x3f, r1 ; 63 40: cf ef ldi r28, 0xFF ; 255 42: d1 e0 ldi r29, 0x01 ; 1 44: de bf out 0x3e, r29 ; 62 46: cd bf out 0x3d, r28 ; 61 00000048 <__do_copy_data>: 48: 11 e0 ldi r17, 0x01 ; 1 4a: a0 e0 ldi r26, 0x00 ; 0 4c: b1 e0 ldi r27, 0x01 ; 1 4e: e2 e6 ldi r30, 0x62 ; 98 50: fa e0 ldi r31, 0x0A ; 10 52: 02 c0 rjmp .+4 ; 0x58 <__do_copy_data+0x10> 54: 05 90 lpm r0, Z+ 56: 0d 92 st X+, r0 58: ae 31 cpi r26, 0x1E ; 30 5a: b1 07 cpc r27, r17 5c: d9 f7 brne .-10 ; 0x54 <__do_copy_data+0xc> 0000005e <__do_clear_bss>: 5e: 21 e0 ldi r18, 0x01 ; 1 60: ae e1 ldi r26, 0x1E ; 30 62: b1 e0 ldi r27, 0x01 ; 1 64: 01 c0 rjmp .+2 ; 0x68 <.do_clear_bss_start> 00000066 <.do_clear_bss_loop>: 66: 1d 92 st X+, r1 00000068 <.do_clear_bss_start>: 68: ac 39 cpi r26, 0x9C ; 156 6a: b2 07 cpc r27, r18 6c: e1 f7 brne .-8 ; 0x66 <.do_clear_bss_loop> 6e: 02 d4 rcall .+2052 ; 0x874
70: f6 c4 rjmp .+2540 ; 0xa5e <_exit> 00000072 <__bad_interrupt>: 72: c6 cf rjmp .-116 ; 0x0 <__vectors> 00000074 : uint8_t ws2812[3]; //To have stored RGB's. typedef void(*Bootfn)(); void sendstr( const char * s ) { 74: cf 93 push r28 76: df 93 push r29 int sl = strlen( s ); 78: ec 01 movw r28, r24 7a: 09 90 ld r0, Y+ 7c: 00 20 and r0, r0 7e: e9 f7 brne .-6 ; 0x7a 80: 21 97 sbiw r28, 0x01 ; 1 82: c8 1b sub r28, r24 84: d9 0b sbc r29, r25 86: cf 30 cpi r28, 0x0F ; 15 88: d1 05 cpc r29, r1 8a: 14 f0 brlt .+4 ; 0x90 8c: ce e0 ldi r28, 0x0E ; 14 8e: d0 e0 ldi r29, 0x00 ; 0 if( sl > 14) sl = 14; memcpy( gdebug, s, sl ); 90: ae 01 movw r20, r28 92: bc 01 movw r22, r24 94: 87 e2 ldi r24, 0x27 ; 39 96: 91 e0 ldi r25, 0x01 ; 1 98: c3 d4 rcall .+2438 ; 0xa20 gdebug[sl] = 0; 9a: fe 01 movw r30, r28 9c: e9 5d subi r30, 0xD9 ; 217 9e: fe 4f sbci r31, 0xFE ; 254 a0: 10 82 st Z, r1 has_debug = sl; a2: c0 93 25 01 sts 0x0125, r28 } a6: df 91 pop r29 a8: cf 91 pop r28 aa: 08 95 ret 000000ac : void setup_clock() { uint8_t calvalfreq; if( commsmode > MAX_COMMS ) return; ac: 80 91 39 01 lds r24, 0x0139 b0: 87 30 cpi r24, 0x07 ; 7 b2: c0 f4 brcc .+48 ; 0xe4 if( commsmode > 2 ) b4: 83 30 cpi r24, 0x03 ; 3 b6: 20 f0 brcs .+8 ; 0xc0 calvalfreq = pgm_read_byte( 0xfe5 ); //16MHz b8: e5 ee ldi r30, 0xE5 ; 229 ba: ff e0 ldi r31, 0x0F ; 15 bc: e4 91 lpm r30, Z be: 05 c0 rjmp .+10 ; 0xca else calvalfreq = pgm_read_byte( 0xfe7 ); //14.7MHz c0: e7 ee ldi r30, 0xE7 ; 231 c2: ff e0 ldi r31, 0x0F ; 15 c4: e4 91 lpm r30, Z uint8_t divval = 0; if( commsmode == 0 || commsmode == 1 || commsmode == 3 || commsmode == 4 ) c6: 82 30 cpi r24, 0x02 ; 2 c8: 19 f4 brne .+6 ; 0xd0 ca: 83 50 subi r24, 0x03 ; 3 cc: 82 30 cpi r24, 0x02 ; 2 ce: 10 f4 brcc .+4 ; 0xd4 divval = 1; //Divide system clock by 2. d0: 81 e0 ldi r24, 0x01 ; 1 d2: 01 c0 rjmp .+2 ; 0xd6 calvalfreq = pgm_read_byte( 0xfe5 ); //16MHz else calvalfreq = pgm_read_byte( 0xfe7 ); //14.7MHz uint8_t divval = 0; d4: 80 e0 ldi r24, 0x00 ; 0 if( commsmode == 0 || commsmode == 1 || commsmode == 3 || commsmode == 4 ) divval = 1; //Divide system clock by 2. OSCCAL0 = calvalfreq;//// ~14.7 MHz / 16 MHz. d6: e0 93 74 00 sts 0x0074, r30 CCP = 0xD8; da: 98 ed ldi r25, 0xD8 ; 216 dc: 90 93 71 00 sts 0x0071, r25 CLKPR = divval; e0: 80 93 73 00 sts 0x0073, r24 e4: 08 95 ret 000000e6 : } //Returns 0 if no error, data, 1 if no data available, 2 if framing error. //This is only used when interrupts are disabled. uint8_t ReadRX() { e6: cf 93 push r28 e8: df 93 push r29 ea: 1f 92 push r1 ec: cd b7 in r28, 0x3d ; 61 ee: de b7 in r29, 0x3e ; 62 volatile uint8_t vc; //No data? if( !( UCSR0A & _BV(RXC0) ) ) f0: 80 91 86 00 lds r24, 0x0086 f4: 87 ff sbrs r24, 7 f6: 10 c0 rjmp .+32 ; 0x118 return 1; //Framing error? if( UCSR0A & _BV(FE0) ) f8: 80 91 86 00 lds r24, 0x0086 fc: 84 ff sbrs r24, 4 fe: 05 c0 rjmp .+10 ; 0x10a { vc = UDR0; 100: 80 91 80 00 lds r24, 0x0080 104: 89 83 std Y+1, r24 ; 0x01 return 2; 106: 82 e0 ldi r24, 0x02 ; 2 108: 08 c0 rjmp .+16 ; 0x11a } //Else, we have data. lastrx = vc = UDR0; 10a: 80 91 80 00 lds r24, 0x0080 10e: 89 83 std Y+1, r24 ; 0x01 110: 80 93 6a 01 sts 0x016A, r24 return 0; 114: 80 e0 ldi r24, 0x00 ; 0 116: 01 c0 rjmp .+2 ; 0x11a { volatile uint8_t vc; //No data? if( !( UCSR0A & _BV(RXC0) ) ) return 1; 118: 81 e0 ldi r24, 0x01 ; 1 } //Else, we have data. lastrx = vc = UDR0; return 0; } 11a: 0f 90 pop r0 11c: df 91 pop r29 11e: cf 91 pop r28 120: 08 95 ret 00000122 : //Returns # of bytes in packet (1+value in MSN of first) //Returns 0 if no packet available. uint8_t ReadRXPack( uint8_t * pac ) { if( rxhead == rxtail ) return 0; 122: 30 91 1f 01 lds r19, 0x011F 126: 20 91 1e 01 lds r18, 0x011E 12a: 32 17 cp r19, r18 12c: e1 f0 breq .+56 ; 0x166 uint8_t i; uint8_t iexp = (rxhead - rxtail)&(RXBUFFERSIZE-1); 12e: 20 91 1f 01 lds r18, 0x011F 132: 30 91 1e 01 lds r19, 0x011E 136: 23 1b sub r18, r19 138: 2f 71 andi r18, 0x1F ; 31 13a: 38 2f mov r19, r24 for( i = 0; i < iexp; i++ ) 13c: fc 01 movw r30, r24 13e: 8e 2f mov r24, r30 140: 83 1b sub r24, r19 142: 82 17 cp r24, r18 144: 70 f4 brcc .+28 ; 0x162 { pac[i] = rxbuffer[rxtail]; 146: a0 91 1e 01 lds r26, 0x011E 14a: b0 e0 ldi r27, 0x00 ; 0 14c: a4 58 subi r26, 0x84 ; 132 14e: be 4f sbci r27, 0xFE ; 254 150: 8c 91 ld r24, X 152: 81 93 st Z+, r24 rxtail = (rxtail+1)&(RXBUFFERSIZE-1); 154: 80 91 1e 01 lds r24, 0x011E 158: 8f 5f subi r24, 0xFF ; 255 15a: 8f 71 andi r24, 0x1F ; 31 15c: 80 93 1e 01 sts 0x011E, r24 160: ee cf rjmp .-36 ; 0x13e 162: 82 2f mov r24, r18 164: 08 95 ret //Returns # of bytes in packet (1+value in MSN of first) //Returns 0 if no packet available. uint8_t ReadRXPack( uint8_t * pac ) { if( rxhead == rxtail ) return 0; 166: 80 e0 ldi r24, 0x00 ; 0 { pac[i] = rxbuffer[rxtail]; rxtail = (rxtail+1)&(RXBUFFERSIZE-1); } return iexp; } 168: 08 95 ret 0000016a : void CheckTX() { //Currently sending if( !( UCSR1A & _BV(UDRE1) ) ) 16a: 80 91 96 00 lds r24, 0x0096 16e: 85 ff sbrs r24, 5 170: 16 c0 rjmp .+44 ; 0x19e { return; } cli(); 172: f8 94 cli if( txhead != txtail ) 174: 90 91 21 01 lds r25, 0x0121 178: 80 91 20 01 lds r24, 0x0120 17c: 98 17 cp r25, r24 17e: 71 f0 breq .+28 ; 0x19c { UDR1 = txbuffer[txtail]; 180: e0 91 20 01 lds r30, 0x0120 184: f0 e0 ldi r31, 0x00 ; 0 186: e5 5c subi r30, 0xC5 ; 197 188: fe 4f sbci r31, 0xFE ; 254 18a: 80 81 ld r24, Z 18c: 80 93 90 00 sts 0x0090, r24 txtail = (txtail + 1)&(TXBUFFERSIZE-1); 190: 80 91 20 01 lds r24, 0x0120 194: 8f 5f subi r24, 0xFF ; 255 196: 8f 71 andi r24, 0x1F ; 31 198: 80 93 20 01 sts 0x0120, r24 } sei(); 19c: 78 94 sei 19e: 08 95 ret 000001a0 <__vector_28>: } ISR(USART1_TX_vect) { 1a0: 1f 92 push r1 1a2: 0f 92 push r0 1a4: 0f b6 in r0, 0x3f ; 63 1a6: 0f 92 push r0 1a8: 11 24 eor r1, r1 1aa: 2f 93 push r18 1ac: 3f 93 push r19 1ae: 4f 93 push r20 1b0: 5f 93 push r21 1b2: 6f 93 push r22 1b4: 7f 93 push r23 1b6: 8f 93 push r24 1b8: 9f 93 push r25 1ba: af 93 push r26 1bc: bf 93 push r27 1be: ef 93 push r30 1c0: ff 93 push r31 CheckTX(); 1c2: d3 df rcall .-90 ; 0x16a } 1c4: ff 91 pop r31 1c6: ef 91 pop r30 1c8: bf 91 pop r27 1ca: af 91 pop r26 1cc: 9f 91 pop r25 1ce: 8f 91 pop r24 1d0: 7f 91 pop r23 1d2: 6f 91 pop r22 1d4: 5f 91 pop r21 1d6: 4f 91 pop r20 1d8: 3f 91 pop r19 1da: 2f 91 pop r18 1dc: 0f 90 pop r0 1de: 0f be out 0x3f, r0 ; 63 1e0: 0f 90 pop r0 1e2: 1f 90 pop r1 1e4: 18 95 reti 000001e6 <__vector_22>: ISR(USART0_RX_vect) { 1e6: 1f 92 push r1 1e8: 0f 92 push r0 1ea: 0f b6 in r0, 0x3f ; 63 1ec: 0f 92 push r0 1ee: 11 24 eor r1, r1 1f0: 2f 93 push r18 1f2: 3f 93 push r19 1f4: 8f 93 push r24 1f6: 9f 93 push r25 1f8: ef 93 push r30 1fa: ff 93 push r31 static uint8_t currxplace; static uint8_t curexplen; static uint8_t newrxhead; uint8_t err = UCSR0A & _BV(FE0); 1fc: 80 91 86 00 lds r24, 0x0086 uint8_t cv = UDR0; 200: 30 91 80 00 lds r19, 0x0080 uint8_t nextrxhead = (newrxhead+1)&(RXBUFFERSIZE-1); 204: e0 91 24 01 lds r30, 0x0124 //Insert them as we get them, but back them out if they're bad. //Warning: Does not handle overflows well. if( err || nextrxhead == rxtail ) 208: 84 fd sbrc r24, 4 20a: 07 c0 rjmp .+14 ; 0x21a <__stack+0x1b> static uint8_t curexplen; static uint8_t newrxhead; uint8_t err = UCSR0A & _BV(FE0); uint8_t cv = UDR0; uint8_t nextrxhead = (newrxhead+1)&(RXBUFFERSIZE-1); 20c: 81 e0 ldi r24, 0x01 ; 1 20e: 8e 0f add r24, r30 210: 8f 71 andi r24, 0x1F ; 31 //Insert them as we get them, but back them out if they're bad. //Warning: Does not handle overflows well. if( err || nextrxhead == rxtail ) 212: 90 91 1e 01 lds r25, 0x011E 216: 89 13 cpse r24, r25 218: 0a c0 rjmp .+20 ; 0x22e <__stack+0x2f> { newrxhead = rxhead; 21a: 80 91 1f 01 lds r24, 0x011F 21e: 80 93 24 01 sts 0x0124, r24 commserrors++; 222: 80 91 26 01 lds r24, 0x0126 226: 8f 5f subi r24, 0xFF ; 255 228: 80 93 26 01 sts 0x0126, r24 22c: 1a c0 rjmp .+52 ; 0x262 <__stack+0x63> currxplace = 0; } else { if( currxplace == 0 ) 22e: 20 91 23 01 lds r18, 0x0123 232: 21 11 cpse r18, r1 234: 06 c0 rjmp .+12 ; 0x242 <__stack+0x43> { curexplen = (cv>>4)+1; 236: 93 2f mov r25, r19 238: 92 95 swap r25 23a: 9f 70 andi r25, 0x0F ; 15 23c: 9f 5f subi r25, 0xFF ; 255 23e: 90 93 22 01 sts 0x0122, r25 } rxbuffer[newrxhead] = cv; 242: f0 e0 ldi r31, 0x00 ; 0 244: e4 58 subi r30, 0x84 ; 132 246: fe 4f sbci r31, 0xFE ; 254 248: 30 83 st Z, r19 newrxhead = nextrxhead; 24a: 80 93 24 01 sts 0x0124, r24 currxplace++; 24e: 91 e0 ldi r25, 0x01 ; 1 250: 92 0f add r25, r18 252: 90 93 23 01 sts 0x0123, r25 if( currxplace == curexplen ) 256: 20 91 22 01 lds r18, 0x0122 25a: 92 13 cpse r25, r18 25c: 04 c0 rjmp .+8 ; 0x266 <__stack+0x67> { rxhead = newrxhead; 25e: 80 93 1f 01 sts 0x011F, r24 currxplace = 0; 262: 10 92 23 01 sts 0x0123, r1 } } } 266: ff 91 pop r31 268: ef 91 pop r30 26a: 9f 91 pop r25 26c: 8f 91 pop r24 26e: 3f 91 pop r19 270: 2f 91 pop r18 272: 0f 90 pop r0 274: 0f be out 0x3f, r0 ; 63 276: 0f 90 pop r0 278: 1f 90 pop r1 27a: 18 95 reti 0000027c : //This function will mess with interrupts. void PushTX( uint8_t val ) { 27c: 1f 93 push r17 27e: cf 93 push r28 280: df 93 push r29 282: 1f 92 push r1 284: cd b7 in r28, 0x3d ; 61 286: de b7 in r29, 0x3e ; 62 uint8_t ntxh = (txhead+1)&(TXBUFFERSIZE-1); 288: 10 91 21 01 lds r17, 0x0121 28c: 1f 5f subi r17, 0xFF ; 255 28e: 1f 71 andi r17, 0x1F ; 31 while( ntxh == txtail ) CheckTX(); 290: 90 91 20 01 lds r25, 0x0120 294: 19 13 cpse r17, r25 296: 04 c0 rjmp .+8 ; 0x2a0 298: 89 83 std Y+1, r24 ; 0x01 29a: 67 df rcall .-306 ; 0x16a 29c: 89 81 ldd r24, Y+1 ; 0x01 29e: f8 cf rjmp .-16 ; 0x290 txbuffer[txhead] = val; 2a0: e0 91 21 01 lds r30, 0x0121 2a4: f0 e0 ldi r31, 0x00 ; 0 2a6: e5 5c subi r30, 0xC5 ; 197 2a8: fe 4f sbci r31, 0xFE ; 254 2aa: 80 83 st Z, r24 txhead = ntxh; 2ac: 10 93 21 01 sts 0x0121, r17 cli(); 2b0: f8 94 cli CheckTX(); 2b2: 5b df rcall .-330 ; 0x16a sei(); 2b4: 78 94 sei } 2b6: 0f 90 pop r0 2b8: df 91 pop r29 2ba: cf 91 pop r28 2bc: 1f 91 pop r17 2be: 08 95 ret 000002c0 : void PushTXBuffer( ) { 2c0: cf 93 push r28 2c2: df 93 push r29 uint8_t i; uint8_t len = workpack[0]>>4; 2c4: d0 91 6b 01 lds r29, 0x016B 2c8: d2 95 swap r29 2ca: df 70 andi r29, 0x0F ; 15 for( i = 0; i <= len; i++ ) 2cc: c0 e0 ldi r28, 0x00 ; 0 { PushTX( workpack[i] ); 2ce: ec 2f mov r30, r28 2d0: f0 e0 ldi r31, 0x00 ; 0 2d2: e5 59 subi r30, 0x95 ; 149 2d4: fe 4f sbci r31, 0xFE ; 254 2d6: 80 81 ld r24, Z 2d8: d1 df rcall .-94 ; 0x27c void PushTXBuffer( ) { uint8_t i; uint8_t len = workpack[0]>>4; for( i = 0; i <= len; i++ ) 2da: cf 5f subi r28, 0xFF ; 255 2dc: dc 17 cp r29, r28 2de: b8 f7 brcc .-18 ; 0x2ce { PushTX( workpack[i] ); } } 2e0: df 91 pop r29 2e2: cf 91 pop r28 2e4: 08 95 ret 000002e6 <__vector_21>: //Happens on entry if aproprite bits in UCSRnD are set. //This might not be in use. EMPTY_INTERRUPT(USART0_START_vect); 2e6: 18 95 reti 000002e8 : void setup_serial() { 2e8: cf 93 push r28 2ea: df 93 push r29 2ec: 1f 92 push r1 2ee: cd b7 in r28, 0x3d ; 61 2f0: de b7 in r29, 0x3e ; 62 if( commsmode > MAX_COMMS ) return; 2f2: e0 91 39 01 lds r30, 0x0139 2f6: e7 30 cpi r30, 0x07 ; 7 2f8: c8 f5 brcc .+114 ; 0x36c static uint8_t tuburrtable[] = { 0x03, 0x2F, 0x00, 0x01, 0x80, 0x80 }; uint8_t ubrr = tuburrtable[commsmode]; 2fa: f0 e0 ldi r31, 0x00 ; 0 2fc: e0 50 subi r30, 0x00 ; 0 2fe: ff 4f sbci r31, 0xFF ; 255 300: 80 81 ld r24, Z volatile uint8_t vc = UDR0; 302: 90 91 80 00 lds r25, 0x0080 306: 99 83 std Y+1, r25 ; 0x01 vc = vc; 308: 99 81 ldd r25, Y+1 ; 0x01 30a: 99 83 std Y+1, r25 ; 0x01 //Flush out any pending UDRs UCSR0A = 0; 30c: 10 92 86 00 sts 0x0086, r1 UCSR0B = 0; 310: 10 92 85 00 sts 0x0085, r1 UCSR0C = 0; 314: 10 92 84 00 sts 0x0084, r1 UCSR0D = 0; 318: 10 92 83 00 sts 0x0083, r1 //RXD0 is our RX; on PA2 DDRA &= ~_BV(2); 31c: d2 98 cbi 0x1a, 2 ; 26 UBRR0H = 0; 31e: 10 92 82 00 sts 0x0082, r1 UBRR0L = ubrr&0x7f; 322: 38 2f mov r19, r24 324: 3f 77 andi r19, 0x7F ; 127 326: 30 93 81 00 sts 0x0081, r19 UCSR0A = (ubrr&0x80)?_BV(U2X0):0; 32a: 88 1f adc r24, r24 32c: 88 27 eor r24, r24 32e: 88 1f adc r24, r24 330: 88 0f add r24, r24 332: 80 93 86 00 sts 0x0086, r24 UCSR0B = _BV(RXEN0) | _BV(RXCIE0); //Enable RX + Maybe interrupt. 336: 90 e9 ldi r25, 0x90 ; 144 338: 90 93 85 00 sts 0x0085, r25 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); 33c: 26 e0 ldi r18, 0x06 ; 6 33e: 20 93 84 00 sts 0x0084, r18 UCSR0D = 0; 342: 10 92 83 00 sts 0x0083, r1 REMAP &= ~_BV(U0MAP); 346: 90 91 65 00 lds r25, 0x0065 34a: 9e 7f andi r25, 0xFE ; 254 34c: 90 93 65 00 sts 0x0065, r25 //TXD1 is our TX; on PA5 DDRA |= _BV(5); 350: d5 9a sbi 0x1a, 5 ; 26 UBRR1H = 0; 352: 10 92 92 00 sts 0x0092, r1 UBRR1L = ubrr&0x7f; 356: 30 93 91 00 sts 0x0091, r19 UCSR1A = (ubrr&0x80)?_BV(U2X1):0; 35a: 80 93 96 00 sts 0x0096, r24 UCSR1B = _BV(TXEN1) | _BV(TXCIE1); 35e: 88 e4 ldi r24, 0x48 ; 72 360: 80 93 95 00 sts 0x0095, r24 UCSR1C = _BV(UCSZ11) | _BV(UCSZ10); 364: 20 93 94 00 sts 0x0094, r18 UCSR1D = 0; 368: 10 92 93 00 sts 0x0093, r1 } 36c: 0f 90 pop r0 36e: df 91 pop r29 370: cf 91 pop r28 372: 08 95 ret 00000374 : void SyncComms() { 374: cf 93 push r28 376: df 93 push r29 } if( code == 2 || lastrx != '\n' ) { //Error, or not a \n goods = 0; 378: c0 e0 ldi r28, 0x00 ; 0 37a: d0 e0 ldi r29, 0x00 ; 0 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 37c: 8c ec ldi r24, 0xCC ; 204 37e: 9c e1 ldi r25, 0x1C ; 28 380: 01 97 sbiw r24, 0x01 ; 1 382: f1 f7 brne .-4 ; 0x380 384: 00 c0 rjmp .+0 ; 0x386 386: 00 00 nop while(goods < 2) { uint8_t code; _delay_ms(2); SendWS2812Single( (commsmode+1)&1, (commsmode+1)&2, (commsmode+1)&4 ); 388: 80 91 39 01 lds r24, 0x0139 38c: 8f 5f subi r24, 0xFF ; 255 38e: 48 2f mov r20, r24 390: 44 70 andi r20, 0x04 ; 4 392: 68 2f mov r22, r24 394: 62 70 andi r22, 0x02 ; 2 396: 81 70 andi r24, 0x01 ; 1 398: 53 d2 rcall .+1190 ; 0x840 39a: 8c ec ldi r24, 0xCC ; 204 39c: 9c e1 ldi r25, 0x1C ; 28 39e: 01 97 sbiw r24, 0x01 ; 1 3a0: f1 f7 brne .-4 ; 0x39e 3a2: 00 c0 rjmp .+0 ; 0x3a4 3a4: 00 00 nop _delay_ms(2); while( ( code = ReadRX() ) == 1 ); 3a6: 9f de rcall .-706 ; 0xe6 3a8: 81 30 cpi r24, 0x01 ; 1 3aa: e9 f3 breq .-6 ; 0x3a6 if( code == 2 ) 3ac: 82 30 cpi r24, 0x02 ; 2 3ae: 29 f4 brne .+10 ; 0x3ba { SendWS2812Single( 0xff,0,0 ); 3b0: 40 e0 ldi r20, 0x00 ; 0 3b2: 60 e0 ldi r22, 0x00 ; 0 3b4: 8f ef ldi r24, 0xFF ; 255 3b6: 44 d2 rcall .+1160 ; 0x840 3b8: 0c c0 rjmp .+24 ; 0x3d2 } else if( lastrx != '\n' ) 3ba: 80 91 6a 01 lds r24, 0x016A 3be: 8a 30 cpi r24, 0x0A ; 10 3c0: 21 f0 breq .+8 ; 0x3ca { SendWS2812Single( 0,0,0xff ); //Flash blue if wrong char was received. 3c2: 4f ef ldi r20, 0xFF ; 255 3c4: 60 e0 ldi r22, 0x00 ; 0 3c6: 80 e0 ldi r24, 0x00 ; 0 3c8: 3b d2 rcall .+1142 ; 0x840 } if( code == 2 || lastrx != '\n' ) 3ca: 80 91 6a 01 lds r24, 0x016A 3ce: 8a 30 cpi r24, 0x0A ; 10 3d0: 99 f0 breq .+38 ; 0x3f8 { //Error, or not a \n goods = 0; commsmode++; 3d2: 80 91 39 01 lds r24, 0x0139 3d6: 8f 5f subi r24, 0xFF ; 255 if( commsmode == MAX_COMMS ) commsmode = 0; 3d8: 86 30 cpi r24, 0x06 ; 6 3da: 19 f0 breq .+6 ; 0x3e2 if( code == 2 || lastrx != '\n' ) { //Error, or not a \n goods = 0; commsmode++; 3dc: 80 93 39 01 sts 0x0139, r24 3e0: 02 c0 rjmp .+4 ; 0x3e6 if( commsmode == MAX_COMMS ) commsmode = 0; 3e2: 10 92 39 01 sts 0x0139, r1 3e6: 8f ef ldi r24, 0xFF ; 255 3e8: 97 e4 ldi r25, 0x47 ; 71 3ea: 01 97 sbiw r24, 0x01 ; 1 3ec: f1 f7 brne .-4 ; 0x3ea 3ee: 00 c0 rjmp .+0 ; 0x3f0 3f0: 00 00 nop _delay_ms(5); setup_clock(); 3f2: 5c de rcall .-840 ; 0xac setup_serial(); 3f4: 79 df rcall .-270 ; 0x2e8 3f6: c0 cf rjmp .-128 ; 0x378 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 3f8: 81 ee ldi r24, 0xE1 ; 225 3fa: 92 e0 ldi r25, 0x02 ; 2 3fc: 01 97 sbiw r24, 0x01 ; 1 3fe: f1 f7 brne .-4 ; 0x3fc 400: 00 00 nop } else { _delay_us(200); SendWS2812Single(0, 0xff,0 ); 402: 40 e0 ldi r20, 0x00 ; 0 404: 6f ef ldi r22, 0xFF ; 255 406: 80 e0 ldi r24, 0x00 ; 0 408: 1b d2 rcall .+1078 ; 0x840 void SyncComms() { int goods = 0; while(goods < 2) 40a: cd 2b or r28, r29 40c: 19 f4 brne .+6 ; 0x414 40e: c1 e0 ldi r28, 0x01 ; 1 410: d0 e0 ldi r29, 0x00 ; 0 412: b4 cf rjmp .-152 ; 0x37c _delay_us(200); SendWS2812Single(0, 0xff,0 ); goods++; } } } 414: df 91 pop r29 416: cf 91 pop r28 418: 08 95 ret 0000041a : void WaitForMark() { //Flush TX Buffer while( txhead != txtail ) CheckTX(); 41a: 90 91 21 01 lds r25, 0x0121 41e: 80 91 20 01 lds r24, 0x0120 422: 98 17 cp r25, r24 424: 11 f0 breq .+4 ; 0x42a 426: a1 de rcall .-702 ; 0x16a 428: f8 cf rjmp .-16 ; 0x41a //TODO: do some interrupt or something to trigger a go. UCSR0B = 0; 42a: 10 92 85 00 sts 0x0085, r1 while( PINA & _BV(2) ); 42e: ca 99 sbic 0x19, 2 ; 25 430: fe cf rjmp .-4 ; 0x42e UDR1 = 0; //Pass the mark on. 432: 10 92 90 00 sts 0x0090, r1 436: 08 95 ret 00000438 : } void OneShot( uint8_t function ) { switch( function ) 438: 82 30 cpi r24, 0x02 ; 2 43a: c9 f0 breq .+50 ; 0x46e 43c: 28 f4 brcc .+10 ; 0x448 43e: 88 23 and r24, r24 440: 41 f0 breq .+16 ; 0x452 442: 81 30 cpi r24, 0x01 ; 1 444: 49 f0 breq .+18 ; 0x458 446: 08 95 ret 448: 83 30 cpi r24, 0x03 ; 3 44a: d9 f0 breq .+54 ; 0x482 44c: 84 30 cpi r24, 0x04 ; 4 44e: 29 f1 breq .+74 ; 0x49a 450: 08 95 ret { case 0: WaitForMark(); 452: e3 df rcall .-58 ; 0x41a StartMagConversion(); 454: e1 d0 rcall .+450 ; 0x618 456: 02 c0 rjmp .+4 ; 0x45c _delay_ms(1); UCSR0B = _BV(RXEN0) | _BV(RXCIE0); //Enable RX again. break; case 1: WaitForMark(); 458: e0 df rcall .-64 ; 0x41a StartAccConversion(); 45a: 4c d1 rcall .+664 ; 0x6f4 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 45c: 86 e6 ldi r24, 0x66 ; 102 45e: 9e e0 ldi r25, 0x0E ; 14 460: 01 97 sbiw r24, 0x01 ; 1 462: f1 f7 brne .-4 ; 0x460 464: 00 00 nop _delay_ms(1); UCSR0B = _BV(RXEN0) | _BV(RXCIE0); //Enable RX again. 466: 80 e9 ldi r24, 0x90 ; 144 468: 80 93 85 00 sts 0x0085, r24 break; 46c: 08 95 ret case 2: GetMagData( (short*)(gdata + has_data ) ); 46e: 80 91 3a 01 lds r24, 0x013A 472: 90 e0 ldi r25, 0x00 ; 0 474: 85 5a subi r24, 0xA5 ; 165 476: 9e 4f sbci r25, 0xFE ; 254 478: d7 d0 rcall .+430 ; 0x628 has_data += 8; 47a: 80 91 3a 01 lds r24, 0x013A 47e: 88 5f subi r24, 0xF8 ; 248 480: 09 c0 rjmp .+18 ; 0x494 break; case 3: GetAccData( (short*)(gdata + has_data ) ); 482: 80 91 3a 01 lds r24, 0x013A 486: 90 e0 ldi r25, 0x00 ; 0 488: 85 5a subi r24, 0xA5 ; 165 48a: 9e 4f sbci r25, 0xFE ; 254 48c: 34 d1 rcall .+616 ; 0x6f6 has_data += 6; 48e: 80 91 3a 01 lds r24, 0x013A 492: 8a 5f subi r24, 0xFA ; 250 494: 80 93 3a 01 sts 0x013A, r24 break; 498: 08 95 ret case 4: if( InitLSM() == 0 ) 49a: 5f d0 rcall .+190 ; 0x55a 49c: 81 11 cpse r24, r1 49e: 09 c0 rjmp .+18 ; 0x4b2 { memcpy( gdebug, "OK", 2 ); 4a0: 8f e4 ldi r24, 0x4F ; 79 4a2: 9b e4 ldi r25, 0x4B ; 75 4a4: 90 93 28 01 sts 0x0128, r25 4a8: 80 93 27 01 sts 0x0127, r24 has_debug = 2; 4ac: 82 e0 ldi r24, 0x02 ; 2 4ae: 80 93 25 01 sts 0x0125, r24 4b2: 08 95 ret 000004b4 : DDDR &= ~( _BV( DSDA ) | _BV(DSCL) ); } static void SendStart() { DDDR |= _BV( DSDA ); 4b4: b8 9a sbi 0x17, 0 ; 23 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 4b6: 85 e0 ldi r24, 0x05 ; 5 4b8: 8a 95 dec r24 4ba: f1 f7 brne .-4 ; 0x4b8 DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR |= _BV( DSCL ); 4bc: b9 9a sbi 0x17, 1 ; 23 4be: 08 95 ret 000004c0 : } static void SendStop() { DDDR &= ~_BV( DSCL ); 4c0: b9 98 cbi 0x17, 1 ; 23 4c2: 85 e0 ldi r24, 0x05 ; 5 4c4: 8a 95 dec r24 4c6: f1 f7 brne .-4 ; 0x4c4 DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR &= ~_BV( DSDA ); 4c8: b8 98 cbi 0x17, 0 ; 23 4ca: 08 95 ret 000004cc : } //Return nonzero on failure. static unsigned char SendByte( unsigned char data ) { 4cc: 98 e0 ldi r25, 0x08 ; 8 4ce: 25 e0 ldi r18, 0x05 ; 5 4d0: 2a 95 dec r18 4d2: f1 f7 brne .-4 ; 0x4d0 */ for( i = 0; i < 8; i++ ) { DELAY_FUNC( 1 * I2CSPEEDBASE ); if( data & 0x80 ) 4d4: 87 ff sbrs r24, 7 4d6: 02 c0 rjmp .+4 ; 0x4dc DDDR &= ~_BV( DSDA ); 4d8: b8 98 cbi 0x17, 0 ; 23 4da: 01 c0 rjmp .+2 ; 0x4de else DDDR |= _BV( DSDA ); 4dc: b8 9a sbi 0x17, 0 ; 23 data<<=1; 4de: 88 0f add r24, r24 4e0: 25 e0 ldi r18, 0x05 ; 5 4e2: 2a 95 dec r18 4e4: f1 f7 brne .-4 ; 0x4e2 DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR &= ~_BV( DSCL ); 4e6: b9 98 cbi 0x17, 1 ; 23 4e8: 2a e0 ldi r18, 0x0A ; 10 4ea: 2a 95 dec r18 4ec: f1 f7 brne .-4 ; 0x4ea DELAY_FUNC( 2 * I2CSPEEDBASE ); DDDR |= _BV( DSCL ); 4ee: b9 9a sbi 0x17, 1 ; 23 4f0: 91 50 subi r25, 0x01 ; 1 //Assume we are in a started state (DSCL = 0 & DSDA = 0) /* DPORT |= _BV(DSDA); DDDR |= _BV(DSDA); */ for( i = 0; i < 8; i++ ) 4f2: 69 f7 brne .-38 ; 0x4ce DDDR |= _BV( DSCL ); } //Immediately after sending last bit, open up DDDR for control. DDDR &= ~_BV( DSDA ); 4f4: b8 98 cbi 0x17, 0 ; 23 4f6: 8a e0 ldi r24, 0x0A ; 10 4f8: 8a 95 dec r24 4fa: f1 f7 brne .-4 ; 0x4f8 DELAY_FUNC( 2 * I2CSPEEDBASE ); DDDR &= ~_BV( DSCL ); 4fc: b9 98 cbi 0x17, 1 ; 23 4fe: 9a e0 ldi r25, 0x0A ; 10 500: 9a 95 dec r25 502: f1 f7 brne .-4 ; 0x500 DELAY_FUNC( 2 * I2CSPEEDBASE ); i = DPIN & _BV( DSDA ); 504: 86 b3 in r24, 0x16 ; 22 DDDR |= _BV( DSCL ); 506: b9 9a sbi 0x17, 1 ; 23 508: 25 e0 ldi r18, 0x05 ; 5 50a: 2a 95 dec r18 50c: f1 f7 brne .-4 ; 0x50a DELAY_FUNC( 1 * I2CSPEEDBASE ); // Leave in open collector. return (i)?1:0; } 50e: 81 70 andi r24, 0x01 ; 1 510: 08 95 ret 00000512 : static unsigned char GetByte( int send_nak ) { unsigned char i; unsigned char ret = 0; DDDR &= ~_BV( DSDA ); 512: b8 98 cbi 0x17, 0 ; 23 514: 38 e0 ldi r19, 0x08 ; 8 #ifdef I2CNEEDGETBYTE static unsigned char GetByte( int send_nak ) { unsigned char i; unsigned char ret = 0; 516: 20 e0 ldi r18, 0x00 ; 0 518: 45 e0 ldi r20, 0x05 ; 5 51a: 4a 95 dec r20 51c: f1 f7 brne .-4 ; 0x51a for( i = 0; i < 8; i++ ) { DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR &= ~_BV( DSCL ); 51e: b9 98 cbi 0x17, 1 ; 23 520: 4a e0 ldi r20, 0x0A ; 10 522: 4a 95 dec r20 524: f1 f7 brne .-4 ; 0x522 DELAY_FUNC( 2 * I2CSPEEDBASE ); ret<<=1; 526: 22 0f add r18, r18 if( DPIN & _BV( DSDA ) ) 528: b0 99 sbic 0x16, 0 ; 22 ret |= 1; 52a: 21 60 ori r18, 0x01 ; 1 52c: 45 e0 ldi r20, 0x05 ; 5 52e: 4a 95 dec r20 530: f1 f7 brne .-4 ; 0x52e DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR |= _BV( DSCL ); 532: b9 9a sbi 0x17, 1 ; 23 534: 31 50 subi r19, 0x01 ; 1 unsigned char i; unsigned char ret = 0; DDDR &= ~_BV( DSDA ); for( i = 0; i < 8; i++ ) 536: 81 f7 brne .-32 ; 0x518 DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR |= _BV( DSCL ); } //Send ack. if( send_nak ) 538: 89 2b or r24, r25 53a: 09 f4 brne .+2 ; 0x53e { } else { DDDR |= _BV( DSDA ); 53c: b8 9a sbi 0x17, 0 ; 23 53e: 85 e0 ldi r24, 0x05 ; 5 540: 8a 95 dec r24 542: f1 f7 brne .-4 ; 0x540 } DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR &= ~_BV( DSCL ); 544: b9 98 cbi 0x17, 1 ; 23 546: 4f e0 ldi r20, 0x0F ; 15 548: 4a 95 dec r20 54a: f1 f7 brne .-4 ; 0x548 DELAY_FUNC( 3 * I2CSPEEDBASE ); DDDR |= _BV( DSCL ); 54c: b9 9a sbi 0x17, 1 ; 23 54e: 85 e0 ldi r24, 0x05 ; 5 550: 8a 95 dec r24 552: f1 f7 brne .-4 ; 0x550 DELAY_FUNC( 1 * I2CSPEEDBASE ); DDDR &= ~_BV( DSDA ); 554: b8 98 cbi 0x17, 0 ; 23 return ret; } 556: 82 2f mov r24, r18 558: 08 95 ret 0000055a : #include "static_i2c.h" unsigned char InitLSM() { 55a: cf 93 push r28 55c: df 93 push r29 55e: cb e0 ldi r28, 0x0B ; 11 560: d0 e0 ldi r29, 0x00 ; 0 //PORT LOW //DDR Undriven static void ConfigI2C() { DPORT &= ~( _BV( DSDA ) | _BV(DSCL) ); 562: 88 b3 in r24, 0x18 ; 24 564: 8c 7f andi r24, 0xFC ; 252 566: 88 bb out 0x18, r24 ; 24 DDDR &= ~( _BV( DSDA ) | _BV(DSCL) ); 568: 87 b3 in r24, 0x17 ; 23 56a: 8c 7f andi r24, 0xFC ; 252 56c: 87 bb out 0x17, r24 ; 23 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 56e: 86 e6 ldi r24, 0x66 ; 102 570: 9e e0 ldi r25, 0x0E ; 14 572: 01 97 sbiw r24, 0x01 ; 1 574: f1 f7 brne .-4 ; 0x572 576: 00 00 nop int i; reset: //Configure Accelerometer ConfigI2C(); _delay_ms(1); SendStart(); 578: 9d df rcall .-198 ; 0x4b4 if( !SendByte( 0xaa ) ) //Check to see if the bus is faulted. 57a: 8a ea ldi r24, 0xAA ; 170 57c: a7 df rcall .-178 ; 0x4cc 57e: 81 11 cpse r24, r1 580: 15 c0 rjmp .+42 ; 0x5ac 582: 21 97 sbiw r28, 0x01 ; 1 { if( tries < 10 ) 584: 20 97 sbiw r28, 0x00 ; 0 586: 79 f0 breq .+30 ; 0x5a6 { LSM_DDR &=~_BV(LSM_SDA); 588: b8 98 cbi 0x17, 0 ; 23 58a: 88 e0 ldi r24, 0x08 ; 8 58c: 90 e0 ldi r25, 0x00 ; 0 for( i = 0; i < 8; i++ ) { LSM_DDR |= _BV(LSM_SCL); 58e: b9 9a sbi 0x17, 1 ; 23 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 590: 2a e0 ldi r18, 0x0A ; 10 592: 2a 95 dec r18 594: f1 f7 brne .-4 ; 0x592 _delay_us(2); LSM_DDR &=~_BV(LSM_SCL); 596: b9 98 cbi 0x17, 1 ; 23 598: 2a e0 ldi r18, 0x0A ; 10 59a: 2a 95 dec r18 59c: f1 f7 brne .-4 ; 0x59a 59e: 01 97 sbiw r24, 0x01 ; 1 { if( tries < 10 ) { LSM_DDR &=~_BV(LSM_SDA); for( i = 0; i < 8; i++ ) 5a0: 00 97 sbiw r24, 0x00 ; 0 5a2: a9 f7 brne .-22 ; 0x58e 5a4: de cf rjmp .-68 ; 0x562 _delay_us(2); } tries++; goto reset; } sendstr( "BER" ); 5a6: 82 e1 ldi r24, 0x12 ; 18 5a8: 91 e0 ldi r25, 0x01 ; 1 5aa: 0d c0 rjmp .+26 ; 0x5c6 SendStop(); return 1; } SendStop(); 5ac: 89 df rcall .-238 ; 0x4c0 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 5ae: 86 e6 ldi r24, 0x66 ; 102 5b0: 9e e0 ldi r25, 0x0E ; 14 5b2: 01 97 sbiw r24, 0x01 ; 1 5b4: f1 f7 brne .-4 ; 0x5b2 5b6: 00 00 nop _delay_ms(1); SendStart(); 5b8: 7d df rcall .-262 ; 0x4b4 if( SendByte( LIN_ADDRESS ) ) 5ba: 8a e3 ldi r24, 0x3A ; 58 5bc: 87 df rcall .-242 ; 0x4cc 5be: 88 23 and r24, r24 5c0: 31 f0 breq .+12 ; 0x5ce { sendstr( "LFA" ); 5c2: 86 e1 ldi r24, 0x16 ; 22 5c4: 91 e0 ldi r25, 0x01 ; 1 5c6: 56 dd rcall .-1364 ; 0x74 SendStop(); 5c8: 7b df rcall .-266 ; 0x4c0 return 1; 5ca: c1 e0 ldi r28, 0x01 ; 1 5cc: 21 c0 rjmp .+66 ; 0x610 } SendByte( 0x20 ); //ctrl reg A 5ce: 80 e2 ldi r24, 0x20 ; 32 5d0: 7d df rcall .-262 ; 0x4cc SendByte( 0xBF ); //Fast, high power. B = ODR1 (100Hz) 5d2: 8f eb ldi r24, 0xBF ; 191 5d4: 7b df rcall .-266 ; 0x4cc SendStop(); 5d6: 74 df rcall .-280 ; 0x4c0 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 5d8: 9a e0 ldi r25, 0x0A ; 10 5da: 9a 95 dec r25 5dc: f1 f7 brne .-4 ; 0x5da _delay_us(2); //TODO: Make accelerometer only fire when SendStart(); 5de: 6a df rcall .-300 ; 0x4b4 if( SendByte( MAG_ADDRESS ) ) 5e0: 8c e3 ldi r24, 0x3C ; 60 5e2: 74 df rcall .-280 ; 0x4cc 5e4: c8 2f mov r28, r24 5e6: 88 23 and r24, r24 5e8: 31 f0 breq .+12 ; 0x5f6 { sendstr( "MFA" ); 5ea: 8a e1 ldi r24, 0x1A ; 26 5ec: 91 e0 ldi r25, 0x01 ; 1 5ee: 42 dd rcall .-1404 ; 0x74 SendStop(); 5f0: 67 df rcall .-306 ; 0x4c0 return 2; 5f2: c2 e0 ldi r28, 0x02 ; 2 5f4: 0d c0 rjmp .+26 ; 0x610 } SendByte( 0x20 ); //ctrl reg A 5f6: 80 e2 ldi r24, 0x20 ; 32 5f8: 69 df rcall .-302 ; 0x4cc SendByte( 0xFC ); //20h Fast, high power, enable temp sensor 5fa: 8c ef ldi r24, 0xFC ; 252 5fc: 67 df rcall .-306 ; 0x4cc SendByte( 0x60 ); //21h +/- 16 gauss 5fe: 80 e6 ldi r24, 0x60 ; 96 600: 65 df rcall .-310 ; 0x4cc SendByte( 0x01 ); //22h single shot mode. 602: 81 e0 ldi r24, 0x01 ; 1 604: 63 df rcall .-314 ; 0x4cc SendByte( 0x02 ); //23h Enable Z MSB 606: 82 e0 ldi r24, 0x02 ; 2 608: 61 df rcall .-318 ; 0x4cc SendByte( 0x00 ); //24h BDU? 60a: 80 e0 ldi r24, 0x00 ; 0 60c: 5f df rcall .-322 ; 0x4cc SendStop(); 60e: 58 df rcall .-336 ; 0x4c0 return 0; } 610: 8c 2f mov r24, r28 612: df 91 pop r29 614: cf 91 pop r28 616: 08 95 ret 00000618 : void StartMagConversion() { //Initiate magnetometer conversion. SendStart(); 618: 4d df rcall .-358 ; 0x4b4 SendByte( MAG_ADDRESS ); 61a: 8c e3 ldi r24, 0x3C ; 60 61c: 57 df rcall .-338 ; 0x4cc SendByte( 0x22 ); //sub address + auto increment 61e: 82 e2 ldi r24, 0x22 ; 34 620: 55 df rcall .-342 ; 0x4cc SendByte( 0x01 ); //22h single shot mode. 622: 81 e0 ldi r24, 0x01 ; 1 624: 53 df rcall .-346 ; 0x4cc SendStop(); 626: 4c cf rjmp .-360 ; 0x4c0 00000628 : } void GetMagData( short * buffer ) { 628: 0f 93 push r16 62a: 1f 93 push r17 62c: cf 93 push r28 62e: df 93 push r29 630: ec 01 movw r28, r24 SendStart(); 632: 40 df rcall .-384 ; 0x4b4 SendByte( MAG_ADDRESS ); 634: 8c e3 ldi r24, 0x3C ; 60 636: 4a df rcall .-364 ; 0x4cc SendByte( 0x28 ); //sub address + auto increment 638: 88 e2 ldi r24, 0x28 ; 40 63a: 48 df rcall .-368 ; 0x4cc SendStop(); 63c: 41 df rcall .-382 ; 0x4c0 63e: 8a e0 ldi r24, 0x0A ; 10 640: 8a 95 dec r24 642: f1 f7 brne .-4 ; 0x640 _delay_us(2); SendStart(); 644: 37 df rcall .-402 ; 0x4b4 SendByte( MAG_ADDRESS | 1 ); 646: 8d e3 ldi r24, 0x3D ; 61 648: 41 df rcall .-382 ; 0x4cc buffer[0] = GetByte( 0 ) << 8; 64a: 80 e0 ldi r24, 0x00 ; 0 64c: 90 e0 ldi r25, 0x00 ; 0 64e: 61 df rcall .-318 ; 0x512 650: 08 2f mov r16, r24 652: 10 e0 ldi r17, 0x00 ; 0 654: 10 2f mov r17, r16 656: 00 27 eor r16, r16 658: 19 83 std Y+1, r17 ; 0x01 65a: 08 83 st Y, r16 buffer[0] |= GetByte( 0 ); 65c: 80 e0 ldi r24, 0x00 ; 0 65e: 90 e0 ldi r25, 0x00 ; 0 660: 58 df rcall .-336 ; 0x512 662: 08 2b or r16, r24 664: 19 83 std Y+1, r17 ; 0x01 666: 08 83 st Y, r16 buffer[1] = GetByte( 0 ) << 8; 668: 80 e0 ldi r24, 0x00 ; 0 66a: 90 e0 ldi r25, 0x00 ; 0 66c: 52 df rcall .-348 ; 0x512 66e: 08 2f mov r16, r24 670: 10 e0 ldi r17, 0x00 ; 0 672: 10 2f mov r17, r16 674: 00 27 eor r16, r16 676: 1b 83 std Y+3, r17 ; 0x03 678: 0a 83 std Y+2, r16 ; 0x02 buffer[1] |= GetByte( 0 ); 67a: 80 e0 ldi r24, 0x00 ; 0 67c: 90 e0 ldi r25, 0x00 ; 0 67e: 49 df rcall .-366 ; 0x512 680: 08 2b or r16, r24 682: 1b 83 std Y+3, r17 ; 0x03 684: 0a 83 std Y+2, r16 ; 0x02 buffer[2] = GetByte( 0 ) << 8; 686: 80 e0 ldi r24, 0x00 ; 0 688: 90 e0 ldi r25, 0x00 ; 0 68a: 43 df rcall .-378 ; 0x512 68c: 08 2f mov r16, r24 68e: 10 e0 ldi r17, 0x00 ; 0 690: 10 2f mov r17, r16 692: 00 27 eor r16, r16 694: 1d 83 std Y+5, r17 ; 0x05 696: 0c 83 std Y+4, r16 ; 0x04 buffer[2] |= GetByte( 1 ); 698: 81 e0 ldi r24, 0x01 ; 1 69a: 90 e0 ldi r25, 0x00 ; 0 69c: 3a df rcall .-396 ; 0x512 69e: 08 2b or r16, r24 6a0: 1d 83 std Y+5, r17 ; 0x05 6a2: 0c 83 std Y+4, r16 ; 0x04 SendStop(); 6a4: 0d df rcall .-486 ; 0x4c0 6a6: 8a e0 ldi r24, 0x0A ; 10 6a8: 8a 95 dec r24 6aa: f1 f7 brne .-4 ; 0x6a8 _delay_us(2); SendStart(); 6ac: 03 df rcall .-506 ; 0x4b4 SendByte( MAG_ADDRESS ); 6ae: 8c e3 ldi r24, 0x3C ; 60 6b0: 0d df rcall .-486 ; 0x4cc SendByte( 0x2E ); //sub address + auto increment 6b2: 8e e2 ldi r24, 0x2E ; 46 6b4: 0b df rcall .-490 ; 0x4cc SendStop(); 6b6: 04 df rcall .-504 ; 0x4c0 6b8: 8a e0 ldi r24, 0x0A ; 10 6ba: 8a 95 dec r24 6bc: f1 f7 brne .-4 ; 0x6ba _delay_us(2); SendStart(); 6be: fa de rcall .-524 ; 0x4b4 SendByte( MAG_ADDRESS | 1 ); 6c0: 8d e3 ldi r24, 0x3D ; 61 6c2: 04 df rcall .-504 ; 0x4cc buffer[3] = GetByte( 0 ) << 8; 6c4: 80 e0 ldi r24, 0x00 ; 0 6c6: 90 e0 ldi r25, 0x00 ; 0 6c8: 24 df rcall .-440 ; 0x512 6ca: 08 2f mov r16, r24 6cc: 10 e0 ldi r17, 0x00 ; 0 6ce: 10 2f mov r17, r16 6d0: 00 27 eor r16, r16 6d2: 1f 83 std Y+7, r17 ; 0x07 6d4: 0e 83 std Y+6, r16 ; 0x06 buffer[3] |= GetByte( 1 ); 6d6: 81 e0 ldi r24, 0x01 ; 1 6d8: 90 e0 ldi r25, 0x00 ; 0 6da: 1b df rcall .-458 ; 0x512 6dc: 08 2b or r16, r24 6de: 1f 83 std Y+7, r17 ; 0x07 6e0: 0e 83 std Y+6, r16 ; 0x06 SendStop(); 6e2: ee de rcall .-548 ; 0x4c0 6e4: 8a e0 ldi r24, 0x0A ; 10 6e6: 8a 95 dec r24 6e8: f1 f7 brne .-4 ; 0x6e6 _delay_us(2); } 6ea: df 91 pop r29 6ec: cf 91 pop r28 6ee: 1f 91 pop r17 6f0: 0f 91 pop r16 6f2: 08 95 ret 000006f4 : void StartAccConversion() { 6f4: 08 95 ret 000006f6 : //TODO!!!! } void GetAccData( short * buffer ) { 6f6: 0f 93 push r16 6f8: 1f 93 push r17 6fa: cf 93 push r28 6fc: df 93 push r29 6fe: ec 01 movw r28, r24 SendStart(); 700: d9 de rcall .-590 ; 0x4b4 SendByte( LIN_ADDRESS ); 702: 8a e3 ldi r24, 0x3A ; 58 704: e3 de rcall .-570 ; 0x4cc SendByte( 0x28 | 0x80 ); //sub address + auto increment 706: 88 ea ldi r24, 0xA8 ; 168 708: e1 de rcall .-574 ; 0x4cc SendStop(); 70a: da de rcall .-588 ; 0x4c0 70c: 8a e0 ldi r24, 0x0A ; 10 70e: 8a 95 dec r24 710: f1 f7 brne .-4 ; 0x70e _delay_us(2); SendStart(); 712: d0 de rcall .-608 ; 0x4b4 SendByte( LIN_ADDRESS | 1 ); 714: 8b e3 ldi r24, 0x3B ; 59 716: da de rcall .-588 ; 0x4cc buffer[0] = GetByte( 0 ); 718: 80 e0 ldi r24, 0x00 ; 0 71a: 90 e0 ldi r25, 0x00 ; 0 71c: fa de rcall .-524 ; 0x512 71e: 08 2f mov r16, r24 720: 10 e0 ldi r17, 0x00 ; 0 722: 19 83 std Y+1, r17 ; 0x01 724: 08 83 st Y, r16 buffer[0] |= GetByte( 0 ) << 8; 726: 80 e0 ldi r24, 0x00 ; 0 728: 90 e0 ldi r25, 0x00 ; 0 72a: f3 de rcall .-538 ; 0x512 72c: 18 2b or r17, r24 72e: 19 83 std Y+1, r17 ; 0x01 730: 08 83 st Y, r16 buffer[1] = GetByte( 0 ); 732: 80 e0 ldi r24, 0x00 ; 0 734: 90 e0 ldi r25, 0x00 ; 0 736: ed de rcall .-550 ; 0x512 738: 08 2f mov r16, r24 73a: 10 e0 ldi r17, 0x00 ; 0 73c: 1b 83 std Y+3, r17 ; 0x03 73e: 0a 83 std Y+2, r16 ; 0x02 buffer[1] |= GetByte( 0 ) << 8; 740: 80 e0 ldi r24, 0x00 ; 0 742: 90 e0 ldi r25, 0x00 ; 0 744: e6 de rcall .-564 ; 0x512 746: 18 2b or r17, r24 748: 1b 83 std Y+3, r17 ; 0x03 74a: 0a 83 std Y+2, r16 ; 0x02 buffer[2] = GetByte( 0 ); 74c: 80 e0 ldi r24, 0x00 ; 0 74e: 90 e0 ldi r25, 0x00 ; 0 750: e0 de rcall .-576 ; 0x512 752: 08 2f mov r16, r24 754: 10 e0 ldi r17, 0x00 ; 0 756: 1d 83 std Y+5, r17 ; 0x05 758: 0c 83 std Y+4, r16 ; 0x04 buffer[2] |= GetByte( 1 ) << 8; 75a: 81 e0 ldi r24, 0x01 ; 1 75c: 90 e0 ldi r25, 0x00 ; 0 75e: d9 de rcall .-590 ; 0x512 760: 18 2b or r17, r24 762: 1d 83 std Y+5, r17 ; 0x05 764: 0c 83 std Y+4, r16 ; 0x04 SendStop(); } 766: df 91 pop r29 768: cf 91 pop r28 76a: 1f 91 pop r17 76c: 0f 91 pop r16 buffer[0] |= GetByte( 0 ) << 8; buffer[1] = GetByte( 0 ); buffer[1] |= GetByte( 0 ) << 8; buffer[2] = GetByte( 0 ); buffer[2] |= GetByte( 1 ) << 8; SendStop(); 76e: a8 ce rjmp .-688 ; 0x4c0 00000770 : void WriteLSMMAGReg( uint8_t reg, uint8_t value ) { 770: 1f 93 push r17 772: cf 93 push r28 774: df 93 push r29 776: 1f 92 push r1 778: cd b7 in r28, 0x3d ; 61 77a: de b7 in r29, 0x3e ; 62 77c: 18 2f mov r17, r24 SendStart(); 77e: 69 83 std Y+1, r22 ; 0x01 780: 99 de rcall .-718 ; 0x4b4 SendByte( MAG_ADDRESS ); 782: 8c e3 ldi r24, 0x3C ; 60 784: a3 de rcall .-698 ; 0x4cc SendByte( reg ); //ctrl reg A 786: 81 2f mov r24, r17 788: a1 de rcall .-702 ; 0x4cc SendByte( value ); //Fast, high power, enable temp sensor 78a: 69 81 ldd r22, Y+1 ; 0x01 78c: 86 2f mov r24, r22 78e: 9e de rcall .-708 ; 0x4cc SendStop(); } 790: 0f 90 pop r0 792: df 91 pop r29 794: cf 91 pop r28 796: 1f 91 pop r17 { SendStart(); SendByte( MAG_ADDRESS ); SendByte( reg ); //ctrl reg A SendByte( value ); //Fast, high power, enable temp sensor SendStop(); 798: 93 ce rjmp .-730 ; 0x4c0 0000079a : } uint8_t ReadLSMMAGReg( uint8_t reg ) { 79a: 1f 93 push r17 79c: cf 93 push r28 79e: df 93 push r29 7a0: 1f 92 push r1 7a2: cd b7 in r28, 0x3d ; 61 7a4: de b7 in r29, 0x3e ; 62 7a6: 18 2f mov r17, r24 uint8_t ret; SendStart(); 7a8: 85 de rcall .-758 ; 0x4b4 SendByte( MAG_ADDRESS ); 7aa: 8c e3 ldi r24, 0x3C ; 60 7ac: 8f de rcall .-738 ; 0x4cc SendByte( reg | 0x80 ); //sub address + auto increment 7ae: 81 2f mov r24, r17 7b0: 80 68 ori r24, 0x80 ; 128 7b2: 8c de rcall .-744 ; 0x4cc SendStop(); 7b4: 85 de rcall .-758 ; 0x4c0 7b6: 8a e0 ldi r24, 0x0A ; 10 7b8: 8a 95 dec r24 7ba: f1 f7 brne .-4 ; 0x7b8 _delay_us(2); SendStart(); 7bc: 7b de rcall .-778 ; 0x4b4 SendByte( MAG_ADDRESS | 1 ); 7be: 8d e3 ldi r24, 0x3D ; 61 7c0: 85 de rcall .-758 ; 0x4cc ret = GetByte( 1 ); 7c2: 81 e0 ldi r24, 0x01 ; 1 7c4: 90 e0 ldi r25, 0x00 ; 0 7c6: a5 de rcall .-694 ; 0x512 SendStop(); 7c8: 89 83 std Y+1, r24 ; 0x01 7ca: 7a de rcall .-780 ; 0x4c0 return ret; } 7cc: 89 81 ldd r24, Y+1 ; 0x01 7ce: 0f 90 pop r0 7d0: df 91 pop r29 7d2: cf 91 pop r28 7d4: 1f 91 pop r17 7d6: 08 95 ret 000007d8 : void WriteLSMLINReg( uint8_t reg, uint8_t value ) { 7d8: 1f 93 push r17 7da: cf 93 push r28 7dc: df 93 push r29 7de: 1f 92 push r1 7e0: cd b7 in r28, 0x3d ; 61 7e2: de b7 in r29, 0x3e ; 62 7e4: 18 2f mov r17, r24 SendStart(); 7e6: 69 83 std Y+1, r22 ; 0x01 7e8: 65 de rcall .-822 ; 0x4b4 SendByte( LIN_ADDRESS ); 7ea: 8a e3 ldi r24, 0x3A ; 58 7ec: 6f de rcall .-802 ; 0x4cc SendByte( reg ); //ctrl reg A 7ee: 81 2f mov r24, r17 7f0: 6d de rcall .-806 ; 0x4cc SendByte( value ); //Fast, high power, enable temp sensor 7f2: 69 81 ldd r22, Y+1 ; 0x01 7f4: 86 2f mov r24, r22 7f6: 6a de rcall .-812 ; 0x4cc SendStop(); } 7f8: 0f 90 pop r0 7fa: df 91 pop r29 7fc: cf 91 pop r28 7fe: 1f 91 pop r17 { SendStart(); SendByte( LIN_ADDRESS ); SendByte( reg ); //ctrl reg A SendByte( value ); //Fast, high power, enable temp sensor SendStop(); 800: 5f ce rjmp .-834 ; 0x4c0 00000802 : } uint8_t ReadLSMLINReg( uint8_t reg ) { 802: 1f 93 push r17 804: cf 93 push r28 806: df 93 push r29 808: 1f 92 push r1 80a: cd b7 in r28, 0x3d ; 61 80c: de b7 in r29, 0x3e ; 62 80e: 18 2f mov r17, r24 uint8_t ret; SendStart(); 810: 51 de rcall .-862 ; 0x4b4 SendByte( LIN_ADDRESS ); 812: 8a e3 ldi r24, 0x3A ; 58 814: 5b de rcall .-842 ; 0x4cc SendByte( reg | 0x80 ); //sub address + auto increment 816: 81 2f mov r24, r17 818: 80 68 ori r24, 0x80 ; 128 81a: 58 de rcall .-848 ; 0x4cc SendStop(); 81c: 51 de rcall .-862 ; 0x4c0 81e: 8a e0 ldi r24, 0x0A ; 10 820: 8a 95 dec r24 822: f1 f7 brne .-4 ; 0x820 _delay_us(2); SendStart(); 824: 47 de rcall .-882 ; 0x4b4 SendByte( MAG_ADDRESS | 1 ); 826: 8d e3 ldi r24, 0x3D ; 61 828: 51 de rcall .-862 ; 0x4cc ret = GetByte( 1 ); 82a: 81 e0 ldi r24, 0x01 ; 1 82c: 90 e0 ldi r25, 0x00 ; 0 82e: 71 de rcall .-798 ; 0x512 SendStop(); 830: 89 83 std Y+1, r24 ; 0x01 832: 46 de rcall .-884 ; 0x4c0 return ret; } 834: 89 81 ldd r24, Y+1 ; 0x01 836: 0f 90 pop r0 838: df 91 pop r29 83a: cf 91 pop r28 83c: 1f 91 pop r17 83e: 08 95 ret 00000840 : 840: ba 9a sbi 0x17, 2 ; 23 842: 4f 93 push r20 844: 6f 93 push r22 846: 8f 93 push r24 848: 43 e0 ldi r20, 0x03 ; 3 0000084a : 84a: 5f 91 pop r21 84c: 68 e0 ldi r22, 0x08 ; 8 0000084e : 84e: 57 ff sbrs r21, 7 850: 06 c0 rjmp .+12 ; 0x85e 852: 32 e0 ldi r19, 0x02 ; 2 854: c2 9a sbi 0x18, 2 ; 24 856: 3a 95 dec r19 858: f1 f7 brne .-4 ; 0x856 85a: c2 98 cbi 0x18, 2 ; 24 85c: 05 c0 rjmp .+10 ; 0x868 0000085e : 85e: c2 9a sbi 0x18, 2 ; 24 860: c2 98 cbi 0x18, 2 ; 24 862: 32 e0 ldi r19, 0x02 ; 2 864: 3a 95 dec r19 866: f1 f7 brne .-4 ; 0x864 00000868 : 868: 55 0f add r21, r21 86a: 6a 95 dec r22 86c: 81 f7 brne .-32 ; 0x84e 86e: 4a 95 dec r20 870: 61 f7 brne .-40 ; 0x84a 872: 08 95 ret 00000874
: int main( ) { uint8_t i; cli(); 874: f8 94 cli commsmode = eeprom_read_byte( (uint8_t*)7 ); 876: 87 e0 ldi r24, 0x07 ; 7 878: 90 e0 ldi r25, 0x00 ; 0 87a: db d0 rcall .+438 ; 0xa32 <__eerd_byte_tn441> 87c: 80 93 39 01 sts 0x0139, r24 if( commsmode >= MAX_COMMS ) commsmode = 0; 880: 86 30 cpi r24, 0x06 ; 6 882: 10 f0 brcs .+4 ; 0x888 884: 10 92 39 01 sts 0x0139, r1 setup_clock(); 888: 11 dc rcall .-2014 ; 0xac setup_serial(); 88a: 2e dd rcall .-1444 ; 0x2e8 //Keep interrupts off until we have sync'd our serial. SyncComms(); 88c: 73 dd rcall .-1306 ; 0x374 //Send 2 \n's for next proc to sync to. PushTX( '\n' ); 88e: 8a e0 ldi r24, 0x0A ; 10 890: f5 dc rcall .-1558 ; 0x27c PushTX( '\n' ); 892: 8a e0 ldi r24, 0x0A ; 10 894: f3 dc rcall .-1562 ; 0x27c //??? Somehow things mess up other cells if we power off before reading/ //I can find no documentation online about this, but after several hundred tests //I found it can corrupt previously read blocks. Read first, that way //corruption is limited. eeprom_write_byte( (uint8_t*)7, commsmode ); 896: 60 91 39 01 lds r22, 0x0139 89a: 87 e0 ldi r24, 0x07 ; 7 89c: 90 e0 ldi r25, 0x00 ; 0 89e: d1 d0 rcall .+418 ; 0xa42 <__eewr_byte_tn441> i = InitLSM(); 8a0: 5c de rcall .-840 ; 0x55a if( i == 0 ) 8a2: 81 11 cpse r24, r1 8a4: 09 c0 rjmp .+18 ; 0x8b8 { memcpy( gdebug, "OK", 2 ); 8a6: 8f e4 ldi r24, 0x4F ; 79 8a8: 9b e4 ldi r25, 0x4B ; 75 8aa: 90 93 28 01 sts 0x0128, r25 8ae: 80 93 27 01 sts 0x0127, r24 has_debug = 2; 8b2: 82 e0 ldi r24, 0x02 ; 2 8b4: 80 93 25 01 sts 0x0125, r24 } SendWS2812Single( 1,1,1 ); 8b8: 41 e0 ldi r20, 0x01 ; 1 8ba: 61 e0 ldi r22, 0x01 ; 1 8bc: 81 e0 ldi r24, 0x01 ; 1 8be: c0 df rcall .-128 ; 0x840 //Begin normal operation. sei(); 8c0: 78 94 sei if( memcmp( workpack, "\253bootloader", 11 ) == 0 ) { _delay_ms(10); //Make sure all stuff is flushed by the time we enter here. There will be no return. cli(); SendWS2812Single( 0x10, 0x01, 0x01 ); ((Bootfn)(0x0d00/2))(); 8c2: 00 e8 ldi r16, 0x80 ; 128 8c4: 16 e0 ldi r17, 0x06 ; 6 //Begin normal operation. sei(); while( 1 ) { int rxlen = ReadRXPack( workpack ); 8c6: 8b e6 ldi r24, 0x6B ; 107 8c8: 91 e0 ldi r25, 0x01 ; 1 8ca: 2b dc rcall .-1962 ; 0x122 8cc: 90 e0 ldi r25, 0x00 ; 0 if( rxlen == 0 ) continue; 8ce: 00 97 sbiw r24, 0x00 ; 0 8d0: d1 f3 breq .-12 ; 0x8c6 // 11 = move to bootloader; requires: 0xa1 'b' 'o' 'o' 't' 'l' 'o' 'a' 'd' 'e' 'r' // // 11,12 = Reserved for bootloader. // switch( workpack[0] & 0x0f ) 8d2: 20 91 6b 01 lds r18, 0x016B 8d6: 2f 70 andi r18, 0x0F ; 15 8d8: 24 30 cpi r18, 0x04 ; 4 8da: 09 f4 brne .+2 ; 0x8de 8dc: 54 c0 rjmp .+168 ; 0x986 8de: 28 f4 brcc .+10 ; 0x8ea 8e0: 22 30 cpi r18, 0x02 ; 2 8e2: 51 f0 breq .+20 ; 0x8f8 8e4: 23 30 cpi r18, 0x03 ; 3 8e6: 51 f1 breq .+84 ; 0x93c 8e8: 4c c0 rjmp .+152 ; 0x982 8ea: 25 30 cpi r18, 0x05 ; 5 8ec: 09 f4 brne .+2 ; 0x8f0 8ee: 6d c0 rjmp .+218 ; 0x9ca 8f0: 2b 30 cpi r18, 0x0B ; 11 8f2: 09 f4 brne .+2 ; 0x8f6 8f4: 6f c0 rjmp .+222 ; 0x9d4 8f6: 45 c0 rjmp .+138 ; 0x982 { case 2: if( rxlen == 1 ) 8f8: 01 97 sbiw r24, 0x01 ; 1 8fa: 59 f4 brne .+22 ; 0x912 { PushTXBuffer(); 8fc: e1 dc rcall .-1598 ; 0x2c0 cli(); 8fe: f8 94 cli SendWS2812Single( ws2812[1], ws2812[0], ws2812[2] ); 900: 40 91 38 01 lds r20, 0x0138 904: 60 91 36 01 lds r22, 0x0136 908: 80 91 37 01 lds r24, 0x0137 90c: 99 df rcall .-206 ; 0x840 sei(); 90e: 78 94 sei 910: da cf rjmp .-76 ; 0x8c6 } else { if( workpack[1] == 0 ) 912: 80 91 6c 01 lds r24, 0x016C 916: 81 11 cpse r24, r1 918: 0d c0 rjmp .+26 ; 0x934 { ws2812[0] = workpack[2]; 91a: 80 91 6d 01 lds r24, 0x016D 91e: 80 93 36 01 sts 0x0136, r24 ws2812[1] = workpack[3]; 922: 80 91 6e 01 lds r24, 0x016E 926: 80 93 37 01 sts 0x0137, r24 ws2812[2] = workpack[4]; 92a: 80 91 6f 01 lds r24, 0x016F 92e: 80 93 38 01 sts 0x0138, r24 932: c9 cf rjmp .-110 ; 0x8c6 } else { workpack[1]--; 934: 81 50 subi r24, 0x01 ; 1 936: 80 93 6c 01 sts 0x016C, r24 93a: 23 c0 rjmp .+70 ; 0x982 } } break; case 3: if( rxlen != 1 ) 93c: 01 97 sbiw r24, 0x01 ; 1 93e: 29 f0 breq .+10 ; 0x94a workpack[1]++; 940: 80 91 6c 01 lds r24, 0x016C 944: 8f 5f subi r24, 0xFF ; 255 946: 80 93 6c 01 sts 0x016C, r24 PushTXBuffer(); 94a: ba dc rcall .-1676 ; 0x2c0 if( has_debug ) 94c: c0 91 25 01 lds r28, 0x0125 950: cc 23 and r28, r28 952: 09 f4 brne .+2 ; 0x956 954: b8 cf rjmp .-144 ; 0x8c6 { workpack[1] = 0; 956: 10 92 6c 01 sts 0x016C, r1 memcpy( workpack+2, gdebug, has_debug ); 95a: d0 e0 ldi r29, 0x00 ; 0 95c: ae 01 movw r20, r28 95e: 67 e2 ldi r22, 0x27 ; 39 960: 71 e0 ldi r23, 0x01 ; 1 962: 8d e6 ldi r24, 0x6D ; 109 964: 91 e0 ldi r25, 0x01 ; 1 966: 5c d0 rcall .+184 ; 0xa20 workpack[0] = ((has_debug+1)<<4) | 0x03; 968: ae 01 movw r20, r28 96a: 4f 5f subi r20, 0xFF ; 255 96c: 5f 4f sbci r21, 0xFF ; 255 96e: 94 e0 ldi r25, 0x04 ; 4 970: 44 0f add r20, r20 972: 55 1f adc r21, r21 974: 9a 95 dec r25 976: e1 f7 brne .-8 ; 0x970 978: 43 60 ori r20, 0x03 ; 3 97a: 40 93 6b 01 sts 0x016B, r20 has_debug = 0; 97e: 10 92 25 01 sts 0x0125, r1 PushTXBuffer(); 982: 9e dc rcall .-1732 ; 0x2c0 984: a0 cf rjmp .-192 ; 0x8c6 } break; case 4: workpack[1]++; 986: 80 91 6c 01 lds r24, 0x016C 98a: 8f 5f subi r24, 0xFF ; 255 98c: 80 93 6c 01 sts 0x016C, r24 PushTXBuffer(); 990: 97 dc rcall .-1746 ; 0x2c0 if( has_data ) 992: c0 91 3a 01 lds r28, 0x013A 996: cc 23 and r28, r28 998: 09 f4 brne .+2 ; 0x99c 99a: 95 cf rjmp .-214 ; 0x8c6 { workpack[1] = 0; 99c: 10 92 6c 01 sts 0x016C, r1 memcpy( workpack+2, gdata, has_data ); 9a0: d0 e0 ldi r29, 0x00 ; 0 9a2: ae 01 movw r20, r28 9a4: 6b e5 ldi r22, 0x5B ; 91 9a6: 71 e0 ldi r23, 0x01 ; 1 9a8: 8d e6 ldi r24, 0x6D ; 109 9aa: 91 e0 ldi r25, 0x01 ; 1 9ac: 39 d0 rcall .+114 ; 0xa20 workpack[0] = ((has_data+1)<<4) | 0x04; 9ae: ae 01 movw r20, r28 9b0: 4f 5f subi r20, 0xFF ; 255 9b2: 5f 4f sbci r21, 0xFF ; 255 9b4: 84 e0 ldi r24, 0x04 ; 4 9b6: 44 0f add r20, r20 9b8: 55 1f adc r21, r21 9ba: 8a 95 dec r24 9bc: e1 f7 brne .-8 ; 0x9b6 9be: 44 60 ori r20, 0x04 ; 4 9c0: 40 93 6b 01 sts 0x016B, r20 has_data = 0; 9c4: 10 92 3a 01 sts 0x013A, r1 9c8: dc cf rjmp .-72 ; 0x982 PushTXBuffer(); } break; case 5: PushTXBuffer(); 9ca: 7a dc rcall .-1804 ; 0x2c0 OneShot( workpack[1] ); 9cc: 80 91 6c 01 lds r24, 0x016C 9d0: 33 dd rcall .-1434 ; 0x438 break; 9d2: 79 cf rjmp .-270 ; 0x8c6 case 11: PushTXBuffer( ); 9d4: 75 dc rcall .-1814 ; 0x2c0 if( memcmp( workpack, "\253bootloader", 11 ) == 0 ) 9d6: 4b e0 ldi r20, 0x0B ; 11 9d8: 50 e0 ldi r21, 0x00 ; 0 9da: 66 e0 ldi r22, 0x06 ; 6 9dc: 71 e0 ldi r23, 0x01 ; 1 9de: 8b e6 ldi r24, 0x6B ; 107 9e0: 91 e0 ldi r25, 0x01 ; 1 9e2: 11 d0 rcall .+34 ; 0xa06 9e4: 89 2b or r24, r25 9e6: 09 f0 breq .+2 ; 0x9ea 9e8: 6e cf rjmp .-292 ; 0x8c6 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); 9ea: 8f ef ldi r24, 0xFF ; 255 9ec: 9f e8 ldi r25, 0x8F ; 143 9ee: 01 97 sbiw r24, 0x01 ; 1 9f0: f1 f7 brne .-4 ; 0x9ee 9f2: 00 c0 rjmp .+0 ; 0x9f4 9f4: 00 00 nop { _delay_ms(10); //Make sure all stuff is flushed by the time we enter here. There will be no return. cli(); 9f6: f8 94 cli SendWS2812Single( 0x10, 0x01, 0x01 ); 9f8: 41 e0 ldi r20, 0x01 ; 1 9fa: 61 e0 ldi r22, 0x01 ; 1 9fc: 80 e1 ldi r24, 0x10 ; 16 9fe: 20 df rcall .-448 ; 0x840 ((Bootfn)(0x0d00/2))(); a00: f8 01 movw r30, r16 a02: 09 95 icall a04: 60 cf rjmp .-320 ; 0x8c6 00000a06 : a06: fb 01 movw r30, r22 a08: dc 01 movw r26, r24 a0a: 04 c0 rjmp .+8 ; 0xa14 a0c: 8d 91 ld r24, X+ a0e: 01 90 ld r0, Z+ a10: 80 19 sub r24, r0 a12: 21 f4 brne .+8 ; 0xa1c a14: 41 50 subi r20, 0x01 ; 1 a16: 50 40 sbci r21, 0x00 ; 0 a18: c8 f7 brcc .-14 ; 0xa0c a1a: 88 1b sub r24, r24 a1c: 99 0b sbc r25, r25 a1e: 08 95 ret 00000a20 : a20: fb 01 movw r30, r22 a22: dc 01 movw r26, r24 a24: 02 c0 rjmp .+4 ; 0xa2a a26: 01 90 ld r0, Z+ a28: 0d 92 st X+, r0 a2a: 41 50 subi r20, 0x01 ; 1 a2c: 50 40 sbci r21, 0x00 ; 0 a2e: d8 f7 brcc .-10 ; 0xa26 a30: 08 95 ret 00000a32 <__eerd_byte_tn441>: a32: e1 99 sbic 0x1c, 1 ; 28 a34: fe cf rjmp .-4 ; 0xa32 <__eerd_byte_tn441> a36: 1f ba out 0x1f, r1 ; 31 a38: 8e bb out 0x1e, r24 ; 30 a3a: e0 9a sbi 0x1c, 0 ; 28 a3c: 99 27 eor r25, r25 a3e: 8d b3 in r24, 0x1d ; 29 a40: 08 95 ret 00000a42 <__eewr_byte_tn441>: a42: 26 2f mov r18, r22 00000a44 <__eewr_r18_tn441>: a44: e1 99 sbic 0x1c, 1 ; 28 a46: fe cf rjmp .-4 ; 0xa44 <__eewr_r18_tn441> a48: 1c ba out 0x1c, r1 ; 28 a4a: 1f ba out 0x1f, r1 ; 31 a4c: 8e bb out 0x1e, r24 ; 30 a4e: 2d bb out 0x1d, r18 ; 29 a50: 0f b6 in r0, 0x3f ; 63 a52: f8 94 cli a54: e2 9a sbi 0x1c, 2 ; 28 a56: e1 9a sbi 0x1c, 1 ; 28 a58: 0f be out 0x3f, r0 ; 63 a5a: 01 96 adiw r24, 0x01 ; 1 a5c: 08 95 ret 00000a5e <_exit>: a5e: f8 94 cli 00000a60 <__stop_program>: a60: ff cf rjmp .-2 ; 0xa60 <__stop_program>